Since the launch of the Chroma 81 interface, a number of minor improvements have been made to make it more robust, compatible with other devices
and to introduce new functionality. This page lists all such modifications. If you are unsure whether your boards requires any of these modifications
then email me and I can advise you.
Pull Down Resistors
For improved compatibility with devices connected behind Chroma, resistors R12 and R13 have been changed to 2k2. For improved reliability using
ROM cartridges, resistor R14 has also been changed to 2k2.
It is desirable to make these modifications, although it is only necessary to do so if compatibility issues are encountered.
All boards produced since June 2015 have had 2k2 resistors fitted as standard.
To provide protection to the main IC on the board, an additional diode has been introduced. It neatly fits on the underside of the board between two existing contacts and hence there is no need to cut cuts or add wire links. It is recommended to make this modification. All boards produced since November 2016 have had the diode fitted as standard. The diode is of type STPS1L30A (Schottky, 30V, 1A) should you wish to fit one yourself. Note that it is the anode of the diode that connects at the contact of the edge connector, as shown in the following photo:
If your board does not have the diode fitted and you have the capability to solder one in place then contact me and I can post a diode to you.
The final release of the logic (version 1.03) for the CPLD shipped with all boards produced from June 2015 onwards. The modifications made since the original release of the logic addressed the following:
- Improved compatibility of a 60Hz ZX81 running custom display driver software.
- Allowed support for the ZXC4 ROM cartridge.
- Slightly reduced power consumption.
It is recommended to update to this logic version, although the only real need is to allow the use of ZXC4 ROM cartridges with the ZX81 (note that the ZXC4 logic would also need to be updated for boards shipped prior to 25th June 2015).
Updating the logic requires the use of a JTAG programmer, with a custom adapter constructed to fit the following holes on the Chroma 81 board:
The CPLD is a Xilinx XC95216-10PQ160C. To reprogram it, you need to plug Chroma 81 into your ZX81 without any other peripherals connected and power it on. Then you should first erase the CPLD and then program in the new logic. You should only attempt to reprogram the logic if you are experienced in programming CPLDs.
|Click here to download the Chroma 81 JED logic file V1.03 text file.|
CHR$128 UDG Support
An update to the CPLD logic was released on 6th February 2018 to extend the interface's functionality to include support for a new graphics mode that was never part of the intended original specification. Along with this, two other changes have been made that allow the interface to handle programs that generate more extreme displays outside the standard TV format.
The changes are as follows:
- UDG support in the 8K-16K region now includes the CHR$128 mode, which allows all inverted characters to also be redefined.
- The minimum supported vertical sync pulse duration has been reduced from 4 scan lines to 2 scan lines.
- The maximum number of scan lines (excluding the vertical sync period) has been increased from 316 to 324.
All boards produced since the release date contain this new version of the logic.
|Click here to download the Chroma 81 JED logic file V1.05 text file.|
Since CHR$128 mode was never part of the original Chroma 81 specification, updating to this logic version is completely optional. If you don't have the facilities to reprogram the CPLD yourself then you can return your board to me (I would also perform any of the other updates as necessary). However, you would need to cover all postage costs. Please contact me before sending your board back.