The ROM cartridge design makes it simple to produce compatible cartridges. These are however limited to 16K in size due to the lack of a bank paging mechanism within the ZX Interface 2, and as a consequence it prohibits access to the 8K Shadow ROM within the ZX Interface 1. It is also not possible to create a mixed ROM/RAM cartridge due to the lack of decoding of the read and write memory control signals. These drawbacks place severe limitations on what applications can be implemented as ROM cartridges.
It is however possible to overcome many of the limitations of the ZX Interface 2 design using novel design techniques. A range of approaches for creating compatible ROM cartridges are described below:
- Standard 16K ROM Cartridge
- Switched Bank Paging ROM Cartridge
- Timed Bank Paging ROM Cartridge
- Software Bank Paging ROM Cartridge
- Programmable Software Bank Paging ROM Cartridge
To demonstrate these techniques I have created a range of ROM cartridge printed circuit boards (PCB) - the ZXC1, ZXC2, ZXC3 and ZXC4. The ZXC1 PCB implements support for the standard, switched paging and timed paging cartridge configurations. The ZXC2 PCB implements support for the standard, switched paging and software paging cartridge configurations. The ZXC3 PCB implements support for the standard and software paging cartridge configurations, and adds the ability to program a FLASH ROM without the need for an EPROM programmer. The ZXC4 PCB implements support for the software paging cartridge configurations and extends the ability to program a FLASH ROM so that all bytes can be programmed and a larger capacity ROM can be supported.
|Standard 16K ROM Cartridges|
The diagram below shows how a standard 27C128 16K x 8 EPROM can be connected to form a ZX Interface 2 ROM cartridge.
The 74LS32 OR gate is required because pin 27 is not used to enable the IC as is the case on an actual ROM IC. Only when both A14 and A15 are low will the /CE line of the 27C128 EPROM go low and hence the IC enabled. All unused gates on the 74LS32 should have their inputs connected to 0V. A 74HC32 can be used instead of the 74LS32 when the cartridge is used with a 16K/48K Spectrum or a Spectrum+2, but a 74LS32 must be used if the cartridge is intended to work with a Spectrum 128 as otherwise address line A14 becomes too heavily loaded.
|Switched Bank Paging ROM Cartridges|
An extension of the standard 16K ROM cartridge design is to use switches to select a specific bank of 16K from a larger capacity EPROM. This still imposes all of the limitations of the ZX Interface 2 design but does allow a single cartridge to contain multiple programs, though only one can be run at a time. The diagram below shows how a standard 27C256 32K x 8 EPROM can be connected to form a switched two bank ZX Interface 2 ROM cartridge.
|Timed Bank Paging ROM Cartridges|
It is possible to overcome the 16K limitation of standard ROM cartridges by paging different banks of 16K into the memory map after specific time intervals have elapsed. As each bank is paged in, its contents must be transferred to RAM before the next bank is paged in. Once all banks have had their contents transferred to RAM, the program now assembled in RAM can be executed. A simple RC circuit can be used to toggle address line A14 of a 32K EPROM to switch between the two banks of 16K after a specific time. Two such circuits could be used with a 64K EPROM to toggle address lines A14 and A15 thus allowing access to three of the four 16K banks (potentially enough for a 48K program). The technique requires the ROM bank paged in at power up to copy a small routine to RAM and then execute it. This routine must transfer the data content of the ROM bank into RAM, and then wait for the paging of the next ROM bank to occur. When this happens, the routine must repeat the transfer cycle for all remaining ROM banks. When the data from all ROM banks has been transferred to RAM, the routine can then execute the program that now resides in RAM. Since the final ROM bank is left paged in, this approach has the drawback that the program transferred to RAM must not require access to the Spectrum's ROM.
This technique was initially demonstrated using a 32K EPROM to create a ROM cartridge of the Ultimate Play The Game title KnightLore, and details on it can be found by following the link Los Trastos de Droy on web site www.speccy.org/trastero. Note that this site is written in Spanish.
The timed bank paging design can be enhanced to completely page out the ROM cartridge from the memory map after a specific time interval has elapsed and then to re-enable the Spectrum's ROM instead. The program transferred to RAM will then have access to the Spectrum's ROM routines and this means that almost any program can be converted into ROM cartridge format. Also, once the ROM cartridge has been paged out, access to the ZX Interface 1 facilities becomes possible since its 8K Shadow ROM can now be paged in and out as required.
The diagram below shows how a standard 27C512 64K x 8 EPROM can be connected to form a 48K ZX Interface 2 ROM cartridge. To produce a 32K ROM cartridge, a 27C256 32K x 8 EPROM can be used instead of the 27C512 and the RC circuit to control address line A15 omitted. Links L1 and L2 are used to produce a 64K ROM cartridge. In this mode all four 16K banks of a 27C512 EPROM are used, but it is not possible to page the Spectrum's ROM back into the memory map.
The values of components R1, R2, R3, R4, R5, R6, C1, C2 and C3 define the time it takes to page between the banks of 16K. The table below shows suitable values for the different ROM cartridge configurations. Bank paging occurs at approximately 0.7 second intervals. Note that the table assumes the use of a 27C512 EPROM. If a 27C128 EPROM is used instead then +5V must be presented on Vpp (pin 1) and /PGM (pin 27). If a 27C256 EPROM is used instead then +5V must be presented on /PGM (pin 27).
|Cartridge Type||Bank Order||L1||L2||R1||R2||C1||R3||R4||C2||R5||R6||C3|
|16K + Page Out||1st||1-2||1-2||Omit||Short||Omit||330k||33k||100u||Omit||Short||Omit|
|32K + Page Out||1st, 2nd||1-2||1-2||Omit||Short||Omit||470k||47k||100u||22k||220k||100u|
|48K||1st, 2nd, 4th||1-2||1-2||33k||330k||100u||Short||Omit||Omit||22k||220k||100u|
|48K + Page Out||1st, 2nd, 4th||1-2||1-2||33k||330k||100u||560k||56k||100u||22k||220k||100u|
|64K||2nd, 1st, 3rd, 4th||2-3||2-3||33k||330k||100u||220k||22k||100u||47k||470k||100u|
The cartridge types that specify 'Page Out' will end by paging the Spectrum's ROM back into the memory map.
An example software routine to coordinate the transfer of the program from the ROM banks to RAM is as follows:
LD HL,$0000 WAIT1:
The routine continually monitors the byte at 0000h, looking for a change in the value. Such a change indicates that the timing circuitry has switched banks. For this technique to work, the corresponding byte in both banks must have different values, and it is best to avoid value FFh since this would be returned during the period when neither bank is enabled. The routine checks that the value of the byte remains stable for 256 consecutive reads to ensure that the switch to the new bank has stabilised.
|Software Bank Paging ROM Cartridges|
Whilst the timed bank paging approach overcomes the 16K limitation of standard ROM cartridges, it still imposes a number of drawbacks:
- The paging technique does not scale nicely beyond 64K, preventing 128K games being transferred into ROM cartridge format
- The time to transfer a 48K program is dictated by the timing circuits and not by the time it actually takes to transfer the program data
- It is not possible to run a program larger than 16K directly from ROM; it must be copied to RAM and run from there
- It is not possible to switch between banks via software control
- It is not possible to page the Spectrum's ROM in and out of the memory map via software control
These issues can be overcome using a memory mapped I/O approach, which allows banks to be switched between via software control. The ZXC2 implements this approach.
|Programmable Software Bank Paging ROM Cartridges|
This technique extends upon the Software Bank Paging mechanism by adding the ability to program a FLASH ROM directly from the Spectrum. The design uses a 29F010 FLASH ROM, which requires a /WE line to instruct the ROM that a write is required. However, the ROM cartridge connector provided by the ZX Interface 2 does not expose /RD and /WR lines since its design assumes that a read-only ROM will be installed within a cartridge and hence any access to must be a read. It is therefore necessary for the enhanced ROM cartridge to create its own read and write control lines. The ZXC3 implements this approach.
The ZXC4 extends the Programmable Software Bank Paging mechanism by allowing the memory mapped control address range to be dynamically changed between the top half of the ROM and the lower half. When the top half is active, it is possible to program the lower half of the FLASH ROM. When the bottom half is active, it is possible to program the upper half of the FLASH ROM.
|Other ROM Cartridge Designs|
Some alternate ROM cartridge designs have been produced by others, and can be viewed by following the links below. Note that these websites are not written in English.
- Scott-Falk Hühn's website
Describes a switched 16 bank Flash based ROM cartridge.
- Droy's website
Describes a 32K time banked ROM cartridge.
- Droy's website
Describes a software clocked 512K Flash based ROM cartridge, allowing conversion of ten SNA shapshot files.
- José Leandro's website
Describes a 512K cycle banked ROM cartridge, each bank consisting of a usable 8K.