INTRODUCTION
A ZX80 upgraded with the 8K ROM would equip the computer with the floating point BASIC of the ZX81 but with the key difference that the ZX80 would permanently run in FAST mode since it lacked the hardware necessary to generate an interrupt driven display. However, an add-on board to provide the ZX80 with this circuitry was created and sold by CompShop Ltd in 1981, and when used in conjunction with the 8K ROM upgrade it would effectively turn the ZX80 or MicroAce (an unofficial clone of the ZX80) into a ZX81.
The SLOW mode upgrade was a kit to be self assembled and was advertised in computer magazines with a selling price of £12.95 + VAT:
![]() |
Your Computer Vol. 1 No. 1, June/July 1981, page 4 |
APPEARANCE
The SLOW mode upgrade was a small double-sided circuit board that had to be soldered to the ZX80 PCB via several flying leads. In addition, several tracks of the ZX80 PCB had to be cut.
![]() |
![]() |
|
SLOW Mode Board - Top | SLOW Mode Board - Bottom |
If fitted very close to the ZX80 circuitry then it was possible for it to fit underneath the top of the ZX80 case.
![]() |
SLOW Mode Board Fiited to a ZX80 |
OPERATION
The SLOW mode board works by generating horizontal synchronisation (HSync) pulses during the top and bottom border areas, letting the original ZX80 hardware generate the HSync pulses for the picture area. As with the ZX81, non-maskable interrupts (NMI) are used to count down the number of border lines to output before running the display driver routine in the ROM to generate the picture area or vertical synchronisation (VSync) pulse. It uses a counter that counts 207 clock pulses before resetting back to 0. At a count of 0, a HSync pulse is begun and it will end when the count reaches 20. An NMI generator circuit is switched on during the top and bottom border durations and this circuitry passes the HSync pulses to the ZX80's video output. When the picture area is being output, the NMI generator is switched off and now the HSync pulses produced by the ZX80 hardware are allowed to pass to the ZX80's video output. The 3 bit character line counter is held in reset whenever the NMI generator is switched on and released when it is switched off. With the NMI generator off, the character line counter will again be held in reset when a read occurs from input port $FE to start the VSync pulse. The character line counter is released when the VSync pulse ends via a write to any other output port (typically $FF).
The assembly instructions refer to the SLOW mode board suffering from a couple of 'funnys':
- The top row of the picture is slanted to the right.
- Adjustment of a resistor value may be required if all characters appear rotated vertically.
The slanting of the top row occurs due to misalignment of the HSync pulses produced by the SLOW mode board compared to those from the ZX80. The ZX80 and SLOW mode board produce HSync pulses that are 20 and 19.5 clock cycles wide respectively, both starting on the rising edge of the clock. On the ZX81 the HSyncs are only 16 clock cycles wide. The first line after the SLOW mode board stops generating the HSyncs, the responsibilty passes to the ZX80 and it ouptuts HSyncs that occur 1 clock cycle later than those from the SLOW mode board. They therefore end 1 clock cycle later as well. In addition, the shorter duration of the SLOW mode board's HSync means that there is a misalignment of 1.5 clock cycles as seen by the TV. Subsequent HSyncs output by the ZX80 align since they are generated at a regular 207 clock cycle interval. When responsibility switches back to the SLOW mode board to generate the HSyncs for the bottom border, the first HSync it outputs occurs 1.5 clock cycles sooner than those from the ZX80. Subsequent HSyncs again occur at a regular 207 clock cycle interval and so are aligned. Therefore, the duration between two consecutive HSyncs is 208 clock cycles for the last line of the top border and 206 clock cycles for the first line of the bottom border. The slanting occurs as the TV adjusts to the new position of the HSyncs in the picture area. It will also adjust again as the bottom border is begun, but this is not noticeable since slanted white just appears like any other white.
The issue characters being rotated vertically within their cells can occur due to the way the SLOW mode board circuitry drives the character line reset line using discrete diodes and resistors rather than an IC. However, once a suitable resistor value has been found to work for a particular computer then it will remain working reliably.
OTHER DIFFERENCES TO THE ZX81
A ZX80 fitted with the 8K ROM and SLOW mode board allows the ZX80 to display a continuous picture whilst running a user program and so allows it to run all ZX81 software, but a number of hardware differences remain between the computers such that the two systems do not function identically.
- The wider HSyncs of the top and bottom border cause SLOW mode programs to run more slowly since an extra 4 clock cycles per border line are spent generating the HSync instead of running the program.
- The ZX81 has pull-up resistors on all of the 8 data lines and this means that reading from a non-existent input port will return the value $FF. The ZX80 only has a pull-up resistor on data line 6 and so reading from a non-existent input port returns the value $40 (in theory since the other data lines are floating then they could be returned as 1 but in practice they always appear to return as 0).
- The ZX81 membrane keyboard uses open-collector circuitry and this allows an external keyboard to be connected via the expansion bus and used at the same time as the membrane keyboard. However, the ZX80's membrane keyboard doesn't use open-collector circuitry and as a result it cannot be used with an external keyboard connected via the expansion bus. It also means that it is not possible to use a joystick interface that responds to reads of the keyboard ports, e.g. it can't be used with a cursor joystick interface.
- The ZX81 exposes a /ROMCS line on its expansion bus that allows its internal ROM to be overridden by an external device. The ZX80's expansion bus is identical to that of the ZX81 apart from the lack of the /ROMCS line. This means that ROM based devices cannot be connected to the ZX80 unless the ZX80 is modified to expose a /ROMCS line onto the expansion bus.
- The third version of the ZX81's ULA (ULA2C210E) rectified the lack of a backporch signal in the video output, which when missing tends to cause the picture shown by a TV to be very dark and barely visible (more so with modern TVs then original TVs from the early 1980s). The ZX80's video output does not include a backporch signal and so is similar to the earlier ZX81 ULA versions. A photo showing how a modern TV displays the ZX80 video signal this can be seen on the pages describing the Chroma 80 SCART interface.
- The output circuitry of the EAR socket is different to that of the ZX81, but this is not significant enough to prevent programs for ZX81 being read into the ZX80 with 8K ROM, and vice versa.
- Custom hi-res display drivers reset the character line counter by executing instructions IN $FE following by OUT $FF, which also results in a short pulse being output to the video line. The display driver needs to be timed such that these pulses occur within the HSync periods otherwise the TV will see misaligned HSyncs. On the ZX81, the action of the OUT occurs 3 clock cycles before the end of the instruction. On the ZX80, the action of the OUT only occurs after the instruction has completed. This means the pulse output by the ZX80 will last 3 clock cycles longer than on the ZX81.
ASSEMBLY INSTRUCTIONS
A version of the assembly instructions for the SLOW mode board can be downloaded below.
![]() |
Click here to download the CompShop SLOW mode board assembly instructions. |
MODERN SLOW MODE BOARDS
A modern day equivalent of the SLOW board has been created by Grant Searle. It generates HSyncs of 16 clock cycle duration and so runs SLOW mode programs at an identical speed to that of the ZX81. It also includes circuitry to rectify the picture distortion issues and to insert a backporch signal so that a bright picture is obtained on a TV using the RF video output.